EP610DI-25 vs EP610DC-20 Comparison
Detailed side-by-side comparison of EP610DI-25 by Intel and EP610DC-20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610DI-25 | EP610DC-20 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.95 | $15.85 |
| Part Family | Classic EPLD | β |
| Macrocells | 16 | β |
| Propagation Delay (tPD) | 25 ns | 22 ns |
| Maximum Pipelined Clock Frequency | 100 MHz (max fCNT, per family datasheet) | β |
| I/O Pins | 16 (bidirectional) | 16 (bidirectional) |
| Dedicated Inputs | 4 | 4 |
| Total User I/O | 20 | β |
| Technology | CMOS EPROM (UV-erasable) | β |
| Supply Voltage (VCC) | 5 V nominal | 4.75 V to 5.25 V (5 V nominal) |
| Package Type | Ceramic DIP, glass-sealed (windowed), R-GDIP-T24 | β |
| Pin Count | 24 | β |
| Mounting Type | Through-Hole (DIP) | Through-hole |
| Operating Temperature | Industrial (per "I" suffix) | 0 Β°C to 70 Β°C (commercial) |
| Speed Grade Suffix | 25 = 25 ns | β |
| Compliance | RoHS status unknown (legacy 1990s part) | β |
| Product Type | β | CMOS UV-Erasable Programmable Logic Device (EPLD) |
| Family | β | Classic EP610 |
| Logic Macrocells | β | 16 |
| Total Usable Pins | β | 20 |
| Product Terms (p-terms) | β | 160 |
| Maximum Toggle Frequency (fMAX) | β | 55.6 MHz |
| Package | β | 24-pin Ceramic DIP (CDIP-24) with UV window |
| Programming Method | β | UV erasure + parallel programmer |
| Process Technology | β | CMOS, UV-erasable floating gate |
| RoHS Status | β | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |