EP610DI-35 vs EP610DC-25 Comparison
Detailed side-by-side comparison of EP610DI-35 by Intel and EP610DC-25 by Rochester Electronics. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP610DI-35 - 16-Macrocell Classic EPLD, 35ns, 5V, 24-CDIP | Intel / Altera
EP610DI-35 ObsoleteRochester Electronics
EP610DC-25 - 16-Macrocell Classic EPLD, 25ns tPD, CDIP-24 | Rochester
EP610DC-25 ✓ ActiveSpecification Comparison
| Parameter | EP610DI-35 | EP610DC-25 |
|---|---|---|
| Brand | Intel | Rochester Electronics |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Active |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Series | EP610 | — |
| Logic Cells / Macrocells | 16 macrocells | — |
| Usable Gates | 300 | — |
| Product Terms | 160 | — |
| I/O Pins | 16 bidirectional | — |
| Total Inputs | 20 (including 4 dedicated inputs) | — |
| Propagation Delay (tpd) | 35 ns | — |
| Maximum Toggle Frequency | 28.6 MHz | — |
| Internal Pipelined Data Rate | Up to 100 MHz | — |
| Supply Voltage | 5 V | — |
| Technology | CMOS, UV-erasable | CMOS EPROM (UV-erasable) |
| Package | 24-pin CDIP (Ceramic DIP) | 24-pin CDIP (Ceramic DIP, through-hole) |
| Mounting Type | Through-hole | Through Hole |
| Operating Temperature | [DATA_NEEDED: industrial/commercial grade range] | 0 C to +70 C |
| RoHS Status | [DATA_NEEDED: not confirmed in supplied web data] | — |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Macrocells | — | 16 |
| Equivalent Gates | — | 300 |
| Maximum Propagation Delay (tPD) | — | 25 ns |
| Pipelined Data Rate | — | Up to 100 MHz |
| Number of I/O Pins | — | 22 |
| Number of Dedicated Inputs | — | 4 |
| Total Pin Count | — | 24 |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| Programming Method | — | JEDEC fuse-map / UV-erase |
| Speed Grade Suffix | — | -25 (25 ns tPD) |