EP610DM-35 vs EP610DI-35 Comparison
Detailed side-by-side comparison of EP610DM-35 by Altera and EP610DI-35 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP610DI-35 - 16-Macrocell Classic EPLD, 35ns, 5V, 24-CDIP | Intel / Altera
EP610DI-35 ObsoleteSpecification Comparison
| Parameter | EP610DM-35 | EP610DI-35 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Manufacturer | Altera (Rochester Electronics authorized stock) | — |
| Part Family | Classic EPLD | — |
| Logic Family | PAL-type EPLD, CMOS, UV-erasable | — |
| Number of Macrocells | 16 | — |
| Number of Gates | 300 | — |
| Propagation Delay (tPD) | 35 ns | — |
| Pipelined Data Rate (fMAX) | 100 MHz | — |
| Supply Voltage (VCC) | 5 V (single supply) | — |
| Package | 24-pin CDIP (CERDIP) with UV window | 24-pin CDIP (Ceramic DIP) |
| Temperature Grade (M) | Military -55°C to +125°C | — |
| I/O Pins | 24 dedicated I/O (input + bidirectional) | 16 bidirectional |
| Programmability | UV-erasable, reprogrammable | — |
| Operating Temperature Range | -55°C to +125°C | — |
| MSL Level | [DATA_NEEDED: MSL rating] | — |
| RoHS Status | Non-compliant (contains lead, hermetic CERDIP) | [DATA_NEEDED: not confirmed in supplied web data] |
| Family | — | Altera Classic EPLD |
| Series | — | EP610 |
| Logic Cells / Macrocells | — | 16 macrocells |
| Usable Gates | — | 300 |
| Product Terms | — | 160 |
| Total Inputs | — | 20 (including 4 dedicated inputs) |
| Propagation Delay (tpd) | — | 35 ns |
| Maximum Toggle Frequency | — | 28.6 MHz |
| Internal Pipelined Data Rate | — | Up to 100 MHz |
| Supply Voltage | — | 5 V |
| Technology | — | CMOS, UV-erasable |
| Mounting Type | — | Through-hole |
| Operating Temperature | — | [DATA_NEEDED: industrial/commercial grade range] |