EP610ILC-10 vs EP610DC-15 Comparison
Detailed side-by-side comparison of EP610ILC-10 by Altera and EP610DC-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610ILC-10 | EP610DC-15 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Device Family | Classic EPLD | — |
| Product Type | UV-Erasable / OTP PLD | — |
| Architecture | PAL-type with macrocells | UV-erasable CMOS PAL-type |
| Macrocells | 16 | 16 |
| Usable Gates | 300 | — |
| Product Terms | 160 | — |
| I/O Pins | 16 | — |
| Dedicated Inputs | 4 | 20 |
| Supply Voltage | 5 V (single supply) | — |
| Pin-to-Pin Delay (tPD) | 10 ns (grade -10) | — |
| Counter Frequency (fCNT) | 100 MHz | — |
| Logic Family Compatibility | TTL (5 V CMOS/TTL-compatible I/O) | — |
| Package | PLCC-28 (plastic J-lead chip carrier) | 24-pin Ceramic DIP (CDIP-24) with UV window |
| Mounting Type | Surface Mount (PLCC socket or solder) | Through-Hole |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | 0C to 70C (commercial) |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Product Family | — | Classic EPLD (EP610) |
| Logic Expanders | — | 4 |
| Bidirectional I/O Pins | — | 16 |
| Total Product Terms | — | 160 |
| Propagation Delay (tPD) | — | 15 ns (speed grade -15) |
| Maximum Internal Clock Frequency | — | 71.4 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Programming Method | — | JEDEC fuse map, UV erasure |
| Technology | — | CMOS |