EP610ILC-10 vs EP610DC-15 Vergleich
Detaillierter Direktvergleich von EP610ILC-10 von Altera und EP610DC-15 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP610ILC-10 | EP610DC-15 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $7,20 | $7,95 |
| Device Family | Classic EPLD | — |
| Product Type | UV-Erasable / OTP PLD | — |
| Architecture | PAL-type with macrocells | UV-erasable CMOS PAL-type |
| Macrocells | 16 | 16 |
| Usable Gates | 300 | — |
| Product Terms | 160 | — |
| I/O Pins | 16 | — |
| Dedicated Inputs | 4 | 20 |
| Versorgungsspannung | 5 V (single supply) | — |
| Pin-to-Pin Delay (tPD) | 10 ns (grade -10) | — |
| Counter Frequency (fCNT) | 100 MHz | — |
| Logic Family Compatibility | TTL (5 V CMOS/TTL-compatible I/O) | — |
| Gehäuse | PLCC-28 (plastic J-lead chip carrier) | 24-pin Ceramic DIP (CDIP-24) with UV window |
| Montageart | Surface Mount (PLCC socket or solder) | Through-Hole |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | 0C to 70C (commercial) |
| RoHS-Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Product Family | — | Classic EPLD (EP610) |
| Logic Expanders | — | 4 |
| Bidirectional I/O Pins | — | 16 |
| Total Product Terms | — | 160 |
| Propagation Delay (tPD) | — | 15 ns (speed grade -15) |
| Maximum Internal Clock Frequency | — | 71.4 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Programming Method | — | JEDEC fuse map, UV erasure |
| Technology | — | CMOS |