EP610LC-25 vs EP610LC-15 Comparison
Detailed side-by-side comparison of EP610LC-25 by Intel and EP610LC-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610LC-25 | EP610LC-15 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Product Type | EPLD (Erasable Programmable Logic Device) | Classic EPLD (Erasable Programmable Logic Device) |
| Family | Classic EPLD | Altera Classic EPLD (EP610) |
| Macrocells | 16 | — |
| Logic Array Blocks (LABs) | 4 | — |
| Propagation Delay (tPD) | 25 ns | — |
| Maximum Toggle Frequency | 100 MHz | — |
| Pipelined Data Rate | Up to 100 MHz | up to 100 MHz |
| Supply Voltage | 5 V ±5% | — |
| Technology | CMOS | — |
| Programmability | UV-erasable (windowed package) | — |
| Package | PLCC-28 | 28-pin PLCC (J-lead, plastic OTP) |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) [DATA_NEEDED: full temperature grade] |
| Mounting Type | Surface Mount | Surface Mount |
| I/O Pins | [DATA_NEEDED: exact I/O count] | — |
| RoHS Status | [DATA_NEEDED] | unknown |
| Logic Elements / Macrocells | — | 16 macrocells |
| Equivalent Gates | — | 300 gates |
| Propagation Delay (tpd) | — | 15 ns |
| Counter Frequency (fmax) | — | 83.3 MHz |
| Supply Voltage (Vcc) | — | 5 V (single supply) |
| Process Technology | — | CMOS |
| Number of Pins | — | 28 |
| Programming | — | OTP (one-time programmable) |
| MSL Level | — | [DATA_NEEDED: MSL rating] |