EP610LC-25 vs EP610LC-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP610LC-25 sa pamamagitan ng Intel at EP610LC-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP610LC-25 | EP610LC-15 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Product Type | EPLD (Erasable Programmable Logic Device) | Classic EPLD (Erasable Programmable Logic Device) |
| Family | Classic EPLD | Altera Classic EPLD (EP610) |
| Macrocells | 16 | — |
| Logic Array Blocks (LABs) | 4 | — |
| Propagation Delay (tPD) | 25 ns | — |
| Maximum Toggle Frequency | 100 MHz | — |
| Pipelined Data Rate | Up to 100 MHz | up to 100 MHz |
| Volte ng Pagbibigay | 5 V ±5% | — |
| Technology | CMOS | — |
| Programmability | UV-erasable (windowed package) | — |
| Packhaging | PLCC-28 | 28-pin PLCC (J-lead, plastic OTP) |
| Temperature na Operasyon | 0C to +70C (commercial) | 0C to +70C (commercial) [DATA_NEEDED: full temperature grade] |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| I/O Pins | [DATA_NEEDED: exact I/O count] | — |
| Tindminan RoHS | [DATA_NEEDED] | unknown |
| Logic Elements / Macrocells | — | 16 macrocells |
| Equivalent Gates | — | 300 gates |
| Propagation Delay (tpd) | — | 15 ns |
| Counter Frequency (fmax) | — | 83.3 MHz |
| Supply Voltage (Vcc) | — | 5 V (single supply) |
| Process Technology | — | CMOS |
| Bilang ng Pins | — | 28 |
| Programming | — | OTP (one-time programmable) |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |