EP610LI-15 vs EP610DC-15 Comparison

Detailed side-by-side comparison of EP610LI-15 by Altera and EP610DC-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP610LI-15 EP610DC-15
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last Time Buy Obsolete
Device Family Classic EPLD EP610 —
Macrocells 16 16
Propagation Delay (tPD) 15 ns 15 ns (speed grade -15)
Counter Frequency (fCNT) 83.3 MHz —
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) 4.75 V to 5.25 V
Operating Temperature 0 C to +70 C (commercial, "I" grade) 0C to 70C (commercial)
Process Technology CMOS EPROM (UV-erasable) —
Package 24-pin ceramic DIP, side-brazed, windowed (DIP-24) 24-pin Ceramic DIP (CDIP-24) with UV window
Pin Count 24 —
Programming Method UV erase + EPROM programmer JEDEC fuse map, UV erasure
Logic Blocks AND/OR array, 16 output macrocells —
I/O Standard TTL/CMOS compatible —
Output Type 3-state —
RoHS Status Non-compliant (ceramic DIP, SnPb finish typical) [DATA_NEEDED: RoHS status]
Manufacturer (current) Rochester Electronics (authorized Altera legacy distributor) —
MSL Level [DATA_NEEDED: MSL level] —
Product Family — Classic EPLD (EP610)
Architecture — UV-erasable CMOS PAL-type
Logic Expanders — 4
Dedicated Inputs — 20
Bidirectional I/O Pins — 16
Total Product Terms — 160
Maximum Internal Clock Frequency — 71.4 MHz
Mounting Type — Through-Hole
Technology — CMOS

Datasheets & Resources

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