EP610LI-15 vs EP610ILC-10 Comparison

Detailed side-by-side comparison of EP610LI-15 by Altera and EP610ILC-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP610LI-15 EP610ILC-10
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last Time Buy Obsolete
Device Family Classic EPLD EP610 Classic EPLD
Macrocells 16 16
Propagation Delay (tPD) 15 ns —
Counter Frequency (fCNT) 83.3 MHz 100 MHz
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) —
Operating Temperature 0 C to +70 C (commercial, "I" grade) [DATA_NEEDED: operating temperature range]
Process Technology CMOS EPROM (UV-erasable) —
Package 24-pin ceramic DIP, side-brazed, windowed (DIP-24) PLCC-28 (plastic J-lead chip carrier)
Pin Count 24 —
Programming Method UV erase + EPROM programmer —
Logic Blocks AND/OR array, 16 output macrocells —
I/O Standard TTL/CMOS compatible —
Output Type 3-state —
RoHS Status Non-compliant (ceramic DIP, SnPb finish typical) [DATA_NEEDED: RoHS compliance]
Manufacturer (current) Rochester Electronics (authorized Altera legacy distributor) —
MSL Level [DATA_NEEDED: MSL level] —
Product Type — UV-Erasable / OTP PLD
Architecture — PAL-type with macrocells
Usable Gates — 300
Product Terms — 160
I/O Pins — 16
Dedicated Inputs — 4
Supply Voltage — 5 V (single supply)
Pin-to-Pin Delay (tPD) — 10 ns (grade -10)
Logic Family Compatibility — TTL (5 V CMOS/TTL-compatible I/O)
Mounting Type — Surface Mount (PLCC socket or solder)

Datasheets & Resources

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