EP610LI-15 vs EP610ILC-10 比較
詳細並排比較 EP610LI-15 由 Altera 與 EP610ILC-10 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP610LI-15 | EP610ILC-10 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | Obsolete |
| Device Family | Classic EPLD EP610 | Classic EPLD |
| Macrocells | 16 | 16 |
| Propagation Delay (tPD) | 15 ns | — |
| Counter Frequency (fCNT) | 83.3 MHz | 100 MHz |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | — |
| 工作溫度 | 0 C to +70 C (commercial, "I" grade) | [DATA_NEEDED: operating temperature range] |
| Process Technology | CMOS EPROM (UV-erasable) | — |
| 封裝 | 24-pin ceramic DIP, side-brazed, windowed (DIP-24) | PLCC-28 (plastic J-lead chip carrier) |
| 腳位數 | 24 | — |
| Programming Method | UV erase + EPROM programmer | — |
| Logic Blocks | AND/OR array, 16 output macrocells | — |
| I/O Standard | TTL/CMOS compatible | — |
| 輸出類型 | 3-state | — |
| RoHS 狀態 | Non-compliant (ceramic DIP, SnPb finish typical) | [DATA_NEEDED: RoHS compliance] |
| Manufacturer (current) | Rochester Electronics (authorized Altera legacy distributor) | — |
| MSL 等級 | [DATA_NEEDED: MSL level] | — |
| Product Type | — | UV-Erasable / OTP PLD |
| Architecture | — | PAL-type with macrocells |
| Usable Gates | — | 300 |
| Product Terms | — | 160 |
| I/O Pins | — | 16 |
| Dedicated Inputs | — | 4 |
| 供應電壓 | — | 5 V (single supply) |
| Pin-to-Pin Delay (tPD) | — | 10 ns (grade -10) |
| Logic Family Compatibility | — | TTL (5 V CMOS/TTL-compatible I/O) |
| 安裝類型 | — | Surface Mount (PLCC socket or solder) |