EP610PC-20 vs EP610PC25 Comparison
Detailed side-by-side comparison of EP610PC-20 by Altera and EP610PC25 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610PC-20 | EP610PC25 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $47.80 | $3.60 |
| Family | Classic EPLD | β |
| Logic Elements | 16 macrocells | β |
| Usable Gates | 300 | 300 |
| Propagation Delay (tPD) | 20 ns | 25 ns |
| Maximum Operating Frequency | 100 MHz (pipelined) | β |
| Supply Voltage (VCC) | 5 V Β±10% | 5 V |
| Number of Pins | 24 | β |
| Package | PDIP-24 | PDIP-24 |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Process Technology | CMOS EPROM | β |
| Programmable Flip-Flops | 16 | β |
| Input Pins | 24 | β |
| Output Pins | 16 | β |
| I/O Compatibility | TTL | β |
| Program/Erase Method | UV (windowed) or OTP | β |
| RoHS Status | Non-compliant (legacy PDIP) | unknown |
| Device Family | β | Altera Classic EPLD |
| Logic Type | β | EPLD (Erasable Programmable Logic Device) |
| Macrocells | β | 16 |
| Pipelined Data Rate | β | Up to 100 MHz |
| Programming Voltage (VPP) | β | 12 V |
| ICC (typical) | β | 200 mA |
| Mounting Type | β | Through-Hole |
| Programmability | β | One-Time-Programmable (OTP), UV-erasable variant exists |
| Pin Count | β | 24 |
| Technology | β | 5 V CMOS |
| Lifecycle | β | Obsolete (last shipped ~2000s) |