EP910IDI-15 vs EP910ILC-12 Comparison
Detailed side-by-side comparison of EP910IDI-15 by Altera and EP910ILC-12 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910IDI-15 | EP910ILC-12 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Family | Classic EPLD | Altera EP910 Classic EPLD |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Gates | 450 gates | — |
| Macrocells | 24 | — |
| Maximum User I/O Pins | 36 | — |
| Pin-to-Pin Propagation Delay (tpd) | 15 ns | — |
| Maximum Counter Frequency | 66.6 MHz | — |
| Supply Voltage (Vcc) | 5 V | — |
| Technology | CMOS EPROM | — |
| Program/Erase Method | UV-erasable windowed CerDIP | — |
| Package | 40-pin CDIP (CerDIP) with quartz window | 28-PLCC (J-Lead, 11.5 x 11.5 mm) |
| Operating Temperature | -40C to +85C (industrial, "I" grade) | -40 °C to +85 °C (industrial grade, 'I' suffix) |
| Mounting Type | Through-hole (DIP) | Surface Mount |
| Macrocells Configurable As | D, T, JK, SR flip-flop, or combinatorial | — |
| Development Tool | MAX+PLUS II (legacy) / Altera Classic compiler | — |
| Programming Hardware | Altera Logic Programmer card | — |
| RoHS Status | [DATA_NEEDED: RoHS compliance of CDIP windowed part] | [DATA_NEEDED: RoHS status] |
| Logic Family Compatibility | Pin-, function-, and JEDEC-map compatible across all EP910 speed grades and packages | — |
| Product Type | — | Classic EPLD (Erasable Programmable Logic Device) |
| Number of Macrocells | — | 24 |
| Usable Gates | — | 450 (typical) |
| Propagation Delay (tPD) | — | 12 ns (max) |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Nominal Supply | — | 5 V |
| Memory Technology | — | UV-erasable CMOS EPROM |
| Configuration Storage | — | Non-volatile EPROM (instant-on) |
| Programming Method | — | Altera programming algorithm (serial/parallel master-slave) |
| MSL Level | — | [DATA_NEEDED: MSL level] |
| Number of Pins | — | 28 |
| Feedback Paths | — | 16 dedicated |