EP910ILC-15 vs EP910LI-35 Comparison
Detailed side-by-side comparison of EP910ILC-15 by Intel and EP910LI-35 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910ILC-15 | EP910LI-35 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $16.10 | $25.80 |
| Family | Classic EPLD | Altera Classic EPLD |
| Series | EP910 | β |
| Logic Gates | 450 | β |
| Macrocells | 24 | 24 |
| User I/O Pins | 36 | β |
| Propagation Delay (tPD) | 15 ns | β |
| Maximum Operating Frequency | 83.33 MHz | β |
| Supply Voltage | 5 V | 5 V (4.75 V to 5.25 V) |
| Memory Type | EPROM (UV-erasable) | β |
| Operating Temperature | -40C to +85C (industrial) | -40 Β°C to +85 Β°C (Industrial) |
| Package | 44-pin PLCC (J-lead) | 44-pin PLCC (J-lead) |
| Mounting Type | Surface Mount (SMT) | Surface Mount |
| Propagation Class | -15 speed grade | β |
| Storage Condition | Dry cabinet, humidity-controlled | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | β |
| Device Series | β | EP910 |
| Usable Gates | β | 900 |
| Maximum User I/O Pins | β | 38 |
| Propagation Delay (t_PD) | β | 35 ns |
| Maximum Counter Frequency (f_CNT) | β | 76.9 MHz |
| Process Technology | β | CMOS EPROM |
| Programming Technology | β | EPROM (UV-erasable) |
| Erase/Program Cycles | β | β₯100 |
| Lead Pitch | β | 1.27 mm |