EP910ILC-50 vs EP910ILC-15 Comparison
Detailed side-by-side comparison of EP910ILC-50 by Intel and EP910ILC-15 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP910ILC-15
EP910ILC-15 - 24 Macrocells, 66.6MHz CPLD | Altera Classic Family
EP910ILC-15 NrndSpecification Comparison
| Parameter | EP910ILC-50 | EP910ILC-15 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.85 | $16.10 |
| Family | Altera Classic EPLD | Classic EPLD |
| Macrocells | 24 | 24 |
| Usable Gates | 900 (typical) | β |
| Maximum Frequency | [DATA_NEEDED: fMAX value from datasheet] | β |
| Pin-to-Pin Delay (tpd) | 50 ns | β |
| Supply Voltage (VCC) | 5 V (typical) | β |
| User I/O Pins | 24 | 36 |
| Dedicated Input Pins | 12 | β |
| Package | PLCC-44 (J-lead) | 44-pin PLCC (J-lead) |
| Mounting Type | Surface Mount (socket-compatible) | Surface Mount (SMT) |
| Technology | CMOS EPROM, UV-erasable | β |
| Operating Temperature | 0C to +70C (commercial) | -40C to +85C (industrial) |
| Programming Cycles | 100 (minimum) | β |
| Boundary Scan | IEEE 1149.1 JTAG (selected speed grades) | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance status] |
| Series | β | EP910 |
| Logic Gates | β | 450 |
| Propagation Delay (tPD) | β | 15 ns |
| Maximum Operating Frequency | β | 83.33 MHz |
| Supply Voltage | β | 5 V |
| Memory Type | β | EPROM (UV-erasable) |
| Propagation Class | β | -15 speed grade |
| Storage Condition | β | Dry cabinet, humidity-controlled |