EP910ILC-50 vs EP910ILC-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910ILC-50 sa pamamagitan ng Intel at EP910ILC-15 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910ILC-50 | EP910ILC-15 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | Altera Classic EPLD | Classic EPLD |
| Macrocells | 24 | 24 |
| Usable Gates | 900 (typical) | — |
| Maximum Frequency | [DATA_NEEDED: fMAX value from datasheet] | — |
| Pin-to-Pin Delay (tpd) | 50 ns | — |
| Supply Voltage (VCC) | 5 V (typical) | — |
| User I/O Pins | 24 | 36 |
| Dedicated Input Pins | 12 | — |
| Packhaging | PLCC-44 (J-lead) | 44-pin PLCC (J-lead) |
| Uri ng Pagpapasok | Surface Mount (socket-compatible) | Surface Mount (SMT) |
| Technology | CMOS EPROM, UV-erasable | — |
| Temperature na Operasyon | 0C to +70C (commercial) | -40C to +85C (industrial) |
| Programming Cycles | 100 (minimum) | — |
| Boundary Scan | IEEE 1149.1 JTAG (selected speed grades) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance status] |
| Series | — | EP910 |
| Logic Gates | — | 450 |
| Propagation Delay (tPD) | — | 15 ns |
| Maximum Operating Frequency | — | 83.33 MHz |
| Volte ng Pagbibigay | — | 5 V |
| Uri ng Memory | — | EPROM (UV-erasable) |
| Propagation Class | — | -15 speed grade |
| Storage Condition | — | Dry cabinet, humidity-controlled |