EP910IPC-50 vs EP910IPC-25 Comparison
Detailed side-by-side comparison of EP910IPC-50 by Altera and EP910IPC-25 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910IPC-50 | EP910IPC-25 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $13.85 | $10.40 |
| Product Type | Erasable Programmable Logic Device (EPLD) | β |
| Family | Altera Classic EPLD | Classic EPLD (EP910 series) |
| Logic Capacity | [DATA_NEEDED: macrocell count / equivalent gates] | β |
| Propagation Delay (tPD) | 50 ns | 25 ns |
| Clock-to-Output (tCO) | 35 ns | β |
| Maximum Toggle Frequency | [DATA_NEEDED: fMAX] | β |
| User I/O Pins | 24 | β |
| Package | 40-pin Ceramic DIP (IPC, windowed) | 40-pin PDIP (PDIP-40) |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V |
| Operating Temperature | -40C to +85C (industrial) | 0C to +70C (commercial grade) |
| Technology | CMOS EPROM cell | β |
| Programming Method | Off-board EPROM programmer + UV erase | EPROM cell (OTP / UV erasable) |
| Erasure Method | UV light through ceramic window (IPC package) | β |
| Mounting Type | Through-Hole (DIP) | Through-Hole |
| RoHS Status | [DATA_NEEDED: not stated in verified data] | β |
| Manufacturer | β | Altera (now Intel) |
| Architecture | β | PAL-type EPLD, CMOS, UV/OTP |
| Usable Gates | β | 450 |
| Macrocells | β | 24 |
| Product Terms | β | 240 |
| Maximum Frequency (fMAX) | β | 40 MHz |
| Dedicated Inputs | β | 12 |
| Bidirectional I/O Lines | β | 24 |
| Total Inputs (max) | β | 36 |
| Total Outputs (max) | β | 24 |
| Development Tool | β | MAX+PLUS II |