EP910LC30T vs EP910LC-30Y Comparison
Detailed side-by-side comparison of EP910LC30T by Intel and EP910LC-30Y by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LC30T | EP910LC-30Y |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last Time Buy | NRND |
| Device Family | Altera Classic EPLD | — |
| Logic Capacity | 450 equivalent gates | — |
| Macrocells | 24 | 24 |
| Propagation Delay | 30 ns (tpd) | — |
| Maximum Frequency | 33.3 MHz | — |
| Supply Voltage | 5 V | 5 V (TTL-compatible) |
| Process Technology | CMOS (LC low-power variant) | CMOS, UV-erasable / OTP |
| Programmable Elements | UV-erasable EPROM | — |
| Package | 44-pin PLCC (J-Lead), Tape and Reel | PLCC-44 |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | Commercial 0C to +70C |
| Mounting Type | Surface Mount | Surface Mount (PLCC socket) |
| MSL Level | [DATA_NEEDED: MSL level] | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status not specified in retrieved data] |
| Programming Interface | Altera ByteBlaster-compatible | — |
| Manufacturer | Intel (formerly Altera); currently supplied by Rochester Electronics | — |
| Family | — | Altera Classic EPLD |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | — | 450 |
| Pin-to-Pin Delay (tPD) | — | 30 ns |
| Counter Frequency (fMAX) | — | 100 MHz (family maximum) |
| Speed/Power Grade | — | LC (low-power, 30ns) |
| Processing Flow | — | Y (extended reliability) |
| Logic Compatibility | — | 100% TTL emulation |