EP910LC30T vs EP910LC-30Y 比較
詳細並排比較 EP910LC30T 由 Intel 與 EP910LC-30Y 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP910LC30T | EP910LC-30Y |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | NRND |
| Device Family | Altera Classic EPLD | — |
| Logic Capacity | 450 equivalent gates | — |
| Macrocells | 24 | 24 |
| Propagation Delay | 30 ns (tpd) | — |
| Maximum Frequency | 33.3 MHz | — |
| 供應電壓 | 5 V | 5 V (TTL-compatible) |
| Process Technology | CMOS (LC low-power variant) | CMOS, UV-erasable / OTP |
| Programmable Elements | UV-erasable EPROM | — |
| 封裝 | 44-pin PLCC (J-Lead), Tape and Reel | PLCC-44 |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | Commercial 0C to +70C |
| 安裝類型 | Surface Mount | Surface Mount (PLCC socket) |
| MSL 等級 | [DATA_NEEDED: MSL level] | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status not specified in retrieved data] |
| Programming Interface | Altera ByteBlaster-compatible | — |
| Manufacturer | Intel (formerly Altera); currently supplied by Rochester Electronics | — |
| Family | — | Altera Classic EPLD |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | — | 450 |
| Pin-to-Pin Delay (tPD) | — | 30 ns |
| Counter Frequency (fMAX) | — | 100 MHz (family maximum) |
| Speed/Power Grade | — | LC (low-power, 30ns) |
| Processing Flow | — | Y (extended reliability) |
| Logic Compatibility | — | 100% TTL emulation |