EP910LC44-35 vs EP910LI-35H Comparison
Detailed side-by-side comparison of EP910LC44-35 by Intel and EP910LI-35H by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LC44-35 | EP910LI-35H |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | NRND |
| Family | Classic EPLD (OT sub-family) | Altera Classic EPLD (EP910) |
| Architecture | PAL-type AND/OR array | — |
| Macrocells | 24 | — |
| Usable Gates | 450 | — |
| Propagation Delay (tPD) | 35 ns (max) | — |
| Maximum Frequency (fMAX) | 28.6 MHz | — |
| Total Inputs | 36 | — |
| I/O Pins | 24 | — |
| Global Clocks | 2 | — |
| Supply Voltage (VCC) | 5 V (single supply) | 5 V (±10%) |
| Operating Temperature | 0C to +70C (commercial) | -40C to +85C (industrial) |
| Package | 44-pin PLCC (J-leaded) | 44-pin PLCC (J-lead) |
| Mounting Type | Surface Mount | Surface Mount |
| Process Technology | CMOS | — |
| Programmability | UV-erasable (windowed ceramic) | — |
| Logic Capacity | — | 900 usable gates |
| Macro Cells | — | 24 |
| Speed Grade (tPD) | — | 35 ns |
| Maximum Frequency | — | [DATA_NEEDED: fMAX] |
| Technology | — | CMOS, UV-erasable EPROM cell |
| Standby Current | — | [DATA_NEEDED: ICCSB] |
| Active Supply Current | — | [DATA_NEEDED: ICC] |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA) |
| RoHS Status | — | unknown |
| Lead-Free Option (H suffix) | — | Yes (H suffix) |