EP910LC44-35 vs EP910LI-35H Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910LC44-35 sa pamamagitan ng Intel at EP910LI-35H sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910LC44-35 | EP910LI-35H |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | Classic EPLD (OT sub-family) | Altera Classic EPLD (EP910) |
| Architecture | PAL-type AND/OR array | — |
| Macrocells | 24 | — |
| Usable Gates | 450 | — |
| Propagation Delay (tPD) | 35 ns (max) | — |
| Maximum Frequency (fMAX) | 28.6 MHz | — |
| Total Inputs | 36 | — |
| I/O Pins | 24 | — |
| Global Clocks | 2 | — |
| Supply Voltage (VCC) | 5 V (single supply) | 5 V (±10%) |
| Temperature na Operasyon | 0C to +70C (commercial) | -40C to +85C (industrial) |
| Packhaging | 44-pin PLCC (J-leaded) | 44-pin PLCC (J-lead) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Process Technology | CMOS | — |
| Programmability | UV-erasable (windowed ceramic) | — |
| Logic Capacity | — | 900 usable gates |
| Macro Cells | — | 24 |
| Speed Grade (tPD) | — | 35 ns |
| Maximum Frequency | — | [DATA_NEEDED: fMAX] |
| Technology | — | CMOS, UV-erasable EPROM cell |
| Standby Current | — | [DATA_NEEDED: ICCSB] |
| Active Supply Current | — | [DATA_NEEDED: ICC] |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA) |
| Tindminan RoHS | — | unknown |
| Lead-Free Option (H suffix) | — | Yes (H suffix) |