EP910LC44-40 vs EP910LC44-30T Comparison
Detailed side-by-side comparison of EP910LC44-40 by Altera and EP910LC44-30T by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LC44-40 | EP910LC44-30T |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | Altera Classic EPLD | — |
| Macrocells | 24 | 24 |
| Product Terms (Total) | 240 | — |
| I/O Pins | 24 (bidirectional) | — |
| Dedicated Inputs | 12 | 12 |
| Total Inputs | 36 | 36 |
| Global Clock Inputs | 2 | — |
| Propagation Delay (tPD) | 40 ns | 33 ns |
| Supply Voltage (VCC) | 5 V (nominal) | 4.75 V to 5.25 V (nominal 5 V) |
| Technology | CMOS, UV-erasable EPROM | — |
| Logic Compatibility | TTL-compatible I/O | — |
| Package | 44-pin PLCC (Plastic Leaded Chip Carrier) | PQCC-44 (Plastic Leaded Chip Carrier, J-bend) |
| Operating Temperature | 0C to +70C (commercial) | — |
| Programming Method | JEDEC file via LP6/MP9 or compatible programmer | — |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | — |
| Device Family | — | Classic EPLD |
| Logic Type | — | PAL-type CMOS EPLD (OT PLD) |
| Product Terms | — | 240 |
| I/O Lines | — | 24 (bidirectional) |
| Total Outputs | — | 24 |
| External Clock Inputs | — | 2 |
| Programming Technology | — | CMOS, UV-erasable (windowed package in family) |
| Security Bit | — | Programmable (logic readback protection) |
| Operating Temperature Grade | — | Commercial |
| Terminal Form | — | J-BEND |
| Package Code | — | QCCJ |