EP910LC44-40 vs EP910LC44-30T Comparaison
Comparaison détaillée côte à côte de EP910LC44-40 par Altera et EP910LC44-30T par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP910LC44-40 | EP910LC44-30T |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,75 | $9,75 |
| Family | Altera Classic EPLD | — |
| Macrocells | 24 | 24 |
| Product Terms (Total) | 240 | — |
| I/O Pins | 24 (bidirectional) | — |
| Dedicated Inputs | 12 | 12 |
| Total Inputs | 36 | 36 |
| Global Clock Inputs | 2 | — |
| Propagation Delay (tPD) | 40 ns | 33 ns |
| Supply Voltage (VCC) | 5 V (nominal) | 4.75 V to 5.25 V (nominal 5 V) |
| Technology | CMOS, UV-erasable EPROM | — |
| Logic Compatibility | TTL-compatible I/O | — |
| Boîtier | 44-pin PLCC (Plastic Leaded Chip Carrier) | PQCC-44 (Plastic Leaded Chip Carrier, J-bend) |
| Température de fonctionnement | 0C to +70C (commercial) | — |
| Programming Method | JEDEC file via LP6/MP9 or compatible programmer | — |
| Type de montage | Surface Mount | Surface Mount |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | — |
| Device Family | — | Classic EPLD |
| Logic Type | — | PAL-type CMOS EPLD (OT PLD) |
| Product Terms | — | 240 |
| I/O Lines | — | 24 (bidirectional) |
| Total Outputs | — | 24 |
| External Clock Inputs | — | 2 |
| Programming Technology | — | CMOS, UV-erasable (windowed package in family) |
| Security Bit | — | Programmable (logic readback protection) |
| Operating Temperature Grade | — | Commercial |
| Terminal Form | — | J-BEND |
| Package Code | — | QCCJ |