EP910LI-20 vs EP910IPC-12 Comparison
Detailed side-by-side comparison of EP910LI-20 by Altera and EP910IPC-12 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP910IPC-12
EP910IPC-12 - Classic 24-Macrocell EPLD, 5V, 40-Pin PDIP | Altera
EP910IPC-12 ObsoleteSpecification Comparison
| Parameter | EP910LI-20 | EP910IPC-12 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $19.95 | $14.20 |
| Family | Altera Classic EPLD | Classic EPLD |
| Macrocells | 24 | 24 |
| Maximum Operating Frequency | 62 MHz | β |
| Propagation Delay (tpd) | 20 ns | β |
| Dedicated Inputs | 16 | 10 |
| I/O Pins | 24 | 24 |
| Supply Voltage (VCC) | 5 V | 4.75 V to 5.25 V (5 V nominal) |
| Operating Temperature | -40C to +85C (Industrial) | -40C to +85C (industrial) |
| Package | 40-pin Ceramic DIP (Windowed) | 40-pin PDIP |
| Technology | CMOS, UV-erasable | CMOS EPLD (UV-erasable or OTP) |
| Package Type | Through-Hole, Ceramic DIP with Quartz Window | β |
| Temperature Grade | Industrial (-40C to +85C) | β |
| Pin Count | 40 | β |
| Logic Family | EPLD (Erasable PLD) | β |
| Architecture | Sum-of-products macrocell | β |
| Pin/Package Compatibility | Pin-compatible across EP910 family | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Usable Gates | β | 450 |
| Maximum Operating Frequency (fMAX) | β | 76.9 MHz |
| Pin-to-Pin Propagation Delay (tPD) | β | 12 ns |
| Mounting Type | β | Through Hole |
| Programming Toolchain | β | MAX+PLUS II |
| Logic Capacity | β | Equivalent to ~24 PAL16V8s |