EP910LI-30T vs EP910LC-30 Comparison
Detailed side-by-side comparison of EP910LI-30T by Altera and EP910LC-30 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LI-30T | EP910LC-30 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | Altera Classic EPLD | — |
| Number of Macrocells | 24 | — |
| Usable Gates | 450 | — |
| Propagation Delay (tPD) | 30 ns | 30 ns (max) |
| Clock-to-Output (tCO) | [DATA_NEEDED: tCO] | — |
| Maximum Frequency (fMAX) | [DATA_NEEDED: fMAX] | — |
| Dedicated Inputs | 10 | — |
| I/O Pins | 24 | — |
| Package | PQCC-44 (J-lead) | — |
| Operating Temperature | -40C to +85C (Industrial) | — |
| Technology | CMOS, UV-erasable | — |
| Supply Voltage | [DATA_NEEDED: VCC] | — |
| Mounting Type | Surface Mount | — |
| Programming Method | EPROM (UV-erasable) via Altera Logic Programmer | — |
| RoHS Status | [DATA_NEEDED: RoHS] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: Lead-free] | — |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Macrocell Count | — | 24 |
| Maximum Toggle Frequency | — | 62 MHz |
| Supply Voltage (VCC) | — | 5 V (nominal, TTL) |
| Process Technology | — | CMOS (EPROM-based) |
| Package Type | — | PDIP-40 (Plastic DIP, through-hole) |
| Operating Temperature Grade | — | Commercial (0C to +70C) |
| I/O Pin Count | — | 24 |
| Dedicated Input Pins | — | 36 (including I/O) |
| Product Terms per Macrocell | — | Up to 16 |
| Programming Technology | — | UV-erasable EPROM cell |
| Development Tool | — | Altera MAX+PLUS II |
| MSL Level | — | [DATA_NEEDED: MSL level] |