EP910LI-30T vs EP910LC-30 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910LI-30T sa pamamagitan ng Altera at EP910LC-30 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910LI-30T | EP910LC-30 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Altera Classic EPLD | — |
| Number of Macrocells | 24 | — |
| Usable Gates | 450 | — |
| Propagation Delay (tPD) | 30 ns | 30 ns (max) |
| Clock-to-Output (tCO) | [DATA_NEEDED: tCO] | — |
| Maximum Frequency (fMAX) | [DATA_NEEDED: fMAX] | — |
| Dedicated Inputs | 10 | — |
| I/O Pins | 24 | — |
| Packhaging | PQCC-44 (J-lead) | — |
| Temperature na Operasyon | -40C to +85C (Industrial) | — |
| Technology | CMOS, UV-erasable | — |
| Volte ng Pagbibigay | [DATA_NEEDED: VCC] | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Programming Method | EPROM (UV-erasable) via Altera Logic Programmer | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: Lead-free] | — |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Macrocell Count | — | 24 |
| Maximum Toggle Frequency | — | 62 MHz |
| Supply Voltage (VCC) | — | 5 V (nominal, TTL) |
| Process Technology | — | CMOS (EPROM-based) |
| Package Type | — | PDIP-40 (Plastic DIP, through-hole) |
| Operating Temperature Grade | — | Commercial (0C to +70C) |
| I/O Pin Count | — | 24 |
| Dedicated Input Pins | — | 36 (including I/O) |
| Product Terms per Macrocell | — | Up to 16 |
| Programming Technology | — | UV-erasable EPROM cell |
| Development Tool | — | Altera MAX+PLUS II |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |