EP910LI-35 vs EP910LC-30 Comparison
Detailed side-by-side comparison of EP910LI-35 by Altera and EP910LC-30 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LI-35 | EP910LC-30 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Obsolete |
| Family | Altera Classic EPLD | — |
| Device Series | EP910 | — |
| Usable Gates | 900 | — |
| Macrocells | 24 | — |
| Maximum User I/O Pins | 38 | — |
| Propagation Delay (t_PD) | 35 ns | — |
| Maximum Counter Frequency (f_CNT) | 76.9 MHz | — |
| Supply Voltage | 5 V (4.75 V to 5.25 V) | — |
| Operating Temperature | -40 °C to +85 °C (Industrial) | — |
| Package | 44-pin PLCC (J-lead) | — |
| Process Technology | CMOS EPROM | CMOS (EPROM-based) |
| Programming Technology | EPROM (UV-erasable) | UV-erasable EPROM cell |
| Erase/Program Cycles | ≥100 | — |
| Mounting Type | Surface Mount | — |
| Lead Pitch | 1.27 mm | — |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Macrocell Count | — | 24 |
| Propagation Delay (tPD) | — | 30 ns (max) |
| Maximum Toggle Frequency | — | 62 MHz |
| Supply Voltage (VCC) | — | 5 V (nominal, TTL) |
| Package Type | — | PDIP-40 (Plastic DIP, through-hole) |
| Operating Temperature Grade | — | Commercial (0C to +70C) |
| I/O Pin Count | — | 24 |
| Dedicated Input Pins | — | 36 (including I/O) |
| Product Terms per Macrocell | — | Up to 16 |
| Development Tool | — | Altera MAX+PLUS II |
| MSL Level | — | [DATA_NEEDED: MSL level] |
| RoHS Status | — | [DATA_NEEDED: RoHS status] |