EP910LI-35 vs EP910LC-30 Perbandingan

Perbandingan bersamaan detil EP910LI-35 dari Altera dan EP910LC-30 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP910LI-35 EP910LC-30
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Family Altera Classic EPLD —
Device Series EP910 —
Usable Gates 900 —
Macrocells 24 —
Maximum User I/O Pins 38 —
Propagation Delay (t_PD) 35 ns —
Maximum Counter Frequency (f_CNT) 76.9 MHz —
Tegangan Pemuat 5 V (4.75 V to 5.25 V) —
Suhu Kerja -40 °C to +85 °C (Industrial) —
Paket 44-pin PLCC (J-lead) —
Process Technology CMOS EPROM CMOS (EPROM-based)
Programming Technology EPROM (UV-erasable) UV-erasable EPROM cell
Erase/Program Cycles ≥100 —
Tipe Mounting Surface Mount —
Lead Pitch 1.27 mm —
Device Type — EPLD (Erasable Programmable Logic Device)
Macrocell Count — 24
Propagation Delay (tPD) — 30 ns (max)
Maximum Toggle Frequency — 62 MHz
Supply Voltage (VCC) — 5 V (nominal, TTL)
Package Type — PDIP-40 (Plastic DIP, through-hole)
Operating Temperature Grade — Commercial (0C to +70C)
I/O Pin Count — 24
Dedicated Input Pins — 36 (including I/O)
Product Terms per Macrocell — Up to 16
Development Tool — Altera MAX+PLUS II
Level MSL — [DATA_NEEDED: MSL level]
Status RoHS — [DATA_NEEDED: RoHS status]

Spek dan Sumber

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