EP910LI-35T vs EP910LI-35Y Comparison
Detailed side-by-side comparison of EP910LI-35T by Intel and EP910LI-35Y by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LI-35T | EP910LI-35Y |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last Time Buy | NRND |
| Family | Classic EPLD (EP910) | Altera Classic EPLD |
| Logic Elements | 24 macrocells | — |
| Usable Gates | 450 | 450 |
| Propagation Delay (tPD) | 35 ns | — |
| Maximum Toggle Frequency (fMAX) | 28.6 MHz | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 5 V |
| Technology | CMOS, EPROM-based | CMOS EPROM/UV-erasable |
| Package | 44-pin PLCC (JEDEC) | PLCC-44 (J-lead) |
| Operating Temperature | -40C to +85C (industrial, 'I' suffix) | — |
| Mounting Type | Surface Mount / Socket | Surface Mount |
| Programming Method | EPROM (UV-erasable for windowed versions) | — |
| Data Retention | [DATA_NEEDED: data retention years] | — |
| Number of I/O Pins | [DATA_NEEDED: I/O pin count] | — |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | Compliant (Y suffix) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Macrocells | — | 24 |
| Propagation Delay (tpd) | — | 35 ns |
| Maximum Frequency (fmax) | — | [DATA_NEEDED: maximum toggle frequency in MHz] |
| Process Option | — | L (low-power CMOS) |
| Temperature Grade | — | Industrial (-40 °C to +85 °C) |
| Lead Finish | — | Lead-free (Y suffix, RoHS-compliant) |
| I/O Pins | — | 24 |
| Dedicated Inputs | — | 36 |