EP910LI-35T vs EP910LI-35Y 比較
詳細並排比較 EP910LI-35T 由 Intel 與 EP910LI-35Y 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP910LI-35T | EP910LI-35Y |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | NRND |
| Family | Classic EPLD (EP910) | Altera Classic EPLD |
| Logic Elements | 24 macrocells | — |
| Usable Gates | 450 | 450 |
| Propagation Delay (tPD) | 35 ns | — |
| Maximum Toggle Frequency (fMAX) | 28.6 MHz | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 5 V |
| Technology | CMOS, EPROM-based | CMOS EPROM/UV-erasable |
| 封裝 | 44-pin PLCC (JEDEC) | PLCC-44 (J-lead) |
| 工作溫度 | -40C to +85C (industrial, 'I' suffix) | — |
| 安裝類型 | Surface Mount / Socket | Surface Mount |
| Programming Method | EPROM (UV-erasable for windowed versions) | — |
| Data Retention | [DATA_NEEDED: data retention years] | — |
| Number of I/O Pins | [DATA_NEEDED: I/O pin count] | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance] | Compliant (Y suffix) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Macrocells | — | 24 |
| Propagation Delay (tpd) | — | 35 ns |
| Maximum Frequency (fmax) | — | [DATA_NEEDED: maximum toggle frequency in MHz] |
| Process Option | — | L (low-power CMOS) |
| Temperature Grade | — | Industrial (-40 °C to +85 °C) |
| Lead Finish | — | Lead-free (Y suffix, RoHS-compliant) |
| I/O Pins | — | 24 |
| Dedicated Inputs | — | 36 |