EP910LI-35T vs EP910LI-40T Comparison
Detailed side-by-side comparison of EP910LI-35T by Intel and EP910LI-40T by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LI-35T | EP910LI-40T |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last Time Buy | NRND |
| Family | Classic EPLD (EP910) | Classic EPLD |
| Logic Elements | 24 macrocells | — |
| Usable Gates | 450 | — |
| Propagation Delay (tPD) | 35 ns | 40 ns |
| Maximum Toggle Frequency (fMAX) | 28.6 MHz | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | — |
| Technology | CMOS, EPROM-based | CMOS, UV-erasable EPROM |
| Package | 44-pin PLCC (JEDEC) | Tape and Reel (suffix T); 40-pin DIP / 44-pin PLCC |
| Operating Temperature | -40C to +85C (industrial, 'I' suffix) | -40C to +85C (Industrial) |
| Mounting Type | Surface Mount / Socket | — |
| Programming Method | EPROM (UV-erasable for windowed versions) | Altera Master Programming Unit (MPU), no JTAG |
| Data Retention | [DATA_NEEDED: data retention years] | — |
| Number of I/O Pins | [DATA_NEEDED: I/O pin count] | — |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: rohs status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Macrocells | — | 24 |
| Dedicated Inputs | — | 12 |
| I/O Pins | — | 24 |
| Maximum Inputs | — | 36 |
| Maximum Outputs | — | 24 |
| Product Terms | — | 240 |
| Supply Voltage | — | 5 V (typical) |
| Architecture | — | PAL-type with global bus |