EP910PI-30T vs EP910PI-20T Comparison
Detailed side-by-side comparison of EP910PI-30T by Altera and EP910PI-20T by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910PI-30T | EP910PI-20T |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Macrocells | 24 | — |
| Usable Gates | 480 | — |
| Dedicated Inputs | 10 | — |
| Propagation Delay (tPD) | 30 ns | — |
| Register (Clock-to-Output) Delay | 20 ns | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | — |
| Technology | CMOS, UV-erasable (windowed ceramic) | CMOS EPROM (UV-erasable) |
| Package Type | 40-pin PDIP (ceramic windowed) | — |
| Mounting Type | Through-Hole | Through-Hole (DIP) |
| Operating Temperature | -40 C to +85 C (industrial) | [DATA_NEEDED: operating temperature range] |
| Programming | Altera Classic device programmer / MAX+PLUS II flow | Standard EPROM programmer, JEDEC map |
| RoHS Status | [DATA_NEEDED: RoHS status] | unknown |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Device | — | EP910 |
| Number of Macrocells | — | 24 |
| Number of Usable Gates | — | [DATA_NEEDED: usable gate count] |
| Propagation Delay (tpd) | — | 20 ns |
| Maximum Toggle Frequency | — | 62.5 MHz |
| Number of Dedicated Inputs | — | 12 |
| Number of I/O Pins | — | 20 |
| Number of Pins | — | 40 |
| Package | — | PDIP-40 (PI) |
| Lifecycle Status | — | Not Recommended for New Designs (NRND) |