EP910PI-30T vs EP910PI-20T Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910PI-30T sa pamamagitan ng Altera at EP910PI-20T sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910PI-30T | EP910PI-20T |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Macrocells | 24 | — |
| Usable Gates | 480 | — |
| Dedicated Inputs | 10 | — |
| Propagation Delay (tPD) | 30 ns | — |
| Register (Clock-to-Output) Delay | 20 ns | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | — |
| Technology | CMOS, UV-erasable (windowed ceramic) | CMOS EPROM (UV-erasable) |
| Package Type | 40-pin PDIP (ceramic windowed) | — |
| Uri ng Pagpapasok | Through-Hole | Through-Hole (DIP) |
| Temperature na Operasyon | -40 C to +85 C (industrial) | [DATA_NEEDED: operating temperature range] |
| Programming | Altera Classic device programmer / MAX+PLUS II flow | Standard EPROM programmer, JEDEC map |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Device | — | EP910 |
| Number of Macrocells | — | 24 |
| Number of Usable Gates | — | [DATA_NEEDED: usable gate count] |
| Propagation Delay (tpd) | — | 20 ns |
| Maximum Toggle Frequency | — | 62.5 MHz |
| Number of Dedicated Inputs | — | 12 |
| Number of I/O Pins | — | 20 |
| Bilang ng Pins | — | 40 |
| Packhaging | — | PDIP-40 (PI) |
| Katayuan ng Lifecycle | — | Not Recommended for New Designs (NRND) |