EP910PI-35T vs EP910PC-35 Comparison
Detailed side-by-side comparison of EP910PI-35T by Altera and EP910PC-35 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910PI-35T | EP910PC-35 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | Altera Classic EPLD | Classic EPLD |
| Device Type | Erasable Programmable Logic Device (EPLD) | EPLD (Erasable Programmable Logic Device) |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | — |
| Pin-to-Pin Logic Delay (tpd) | 35 ns | — |
| Counter Frequency (fCNT) | 28.6 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| I/O Logic Compatibility | 100% TTL emulation | — |
| Process Technology | CMOS | — |
| Package | 40-pin PDIP (Plastic DIP) | 40-pin PDIP (Plastic DIP) |
| Mounting Type | Through-Hole | Through-Hole |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Programming Method | UV-erasable, EPROM technology | UV-erase (ceramic) / OTP (plastic), A+PLUS / MAX+PLUS tools |
| On-board Test Circuitry | Yes (logic test mode for AC verification) | — |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | — |
| MSL Level | [DATA_NEEDED: MSL level] | — |
| I/O Pins | — | 24 |
| Dedicated Inputs | — | 12 |
| Total Inputs | — | 36 |
| Product Terms | — | 240 |
| Propagation Delay (tPD) | — | 35 ns |
| Maximum Counter Frequency | — | 37 MHz |
| Internal Performance Frequency | — | 100 MHz |
| Technology | — | CMOS, UV-erasable/OTP |
| Supply Voltage | — | 5 V |
| Architecture | — | PAL-type sum-of-products, AND/OR array |
| Compliance / RoHS | — | [DATA_NEEDED: RoHS status - legacy part] |