EP910PI-35T vs EP910PC-35 Comparaison
Comparaison détaillée côte à côte de EP910PI-35T par Altera et EP910PC-35 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP910PI-35T | EP910PC-35 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $11,15 | $8,70 |
| Family | Altera Classic EPLD | Classic EPLD |
| Device Type | Erasable Programmable Logic Device (EPLD) | EPLD (Erasable Programmable Logic Device) |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | — |
| Pin-to-Pin Logic Delay (tpd) | 35 ns | — |
| Counter Frequency (fCNT) | 28.6 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| I/O Logic Compatibility | 100% TTL emulation | — |
| Process Technology | CMOS | — |
| Boîtier | 40-pin PDIP (Plastic DIP) | 40-pin PDIP (Plastic DIP) |
| Type de montage | Through-Hole | Through-Hole |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Programming Method | UV-erasable, EPROM technology | UV-erase (ceramic) / OTP (plastic), A+PLUS / MAX+PLUS tools |
| On-board Test Circuitry | Yes (logic test mode for AC verification) | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | — |
| Niveau MSL | [DATA_NEEDED: MSL level] | — |
| I/O Pins | — | 24 |
| Dedicated Inputs | — | 12 |
| Total Inputs | — | 36 |
| Product Terms | — | 240 |
| Propagation Delay (tPD) | — | 35 ns |
| Maximum Counter Frequency | — | 37 MHz |
| Internal Performance Frequency | — | 100 MHz |
| Technology | — | CMOS, UV-erasable/OTP |
| Tension d'alimentation | — | 5 V |
| Architecture | — | PAL-type sum-of-products, AND/OR array |
| Compliance / RoHS | — | [DATA_NEEDED: RoHS status - legacy part] |