EPC1L120 vs EPC1213PC8 Comparison
Detailed side-by-side comparison of EPC1L120 by Intel and EPC1213PC8 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPC1L120 - Altera/Intel Configuration Device 120 kbit Serial | PLCC-20
EPC1L120 ⚠ Last Time Buy
Specification Comparison
| Parameter | EPC1L120 | EPC1213PC8 |
|---|---|---|
| Brand | Intel | Altera |
| Category | Memory ICs | Memory ICs |
| Lifecycle Status | Last Time Buy | Obsolete |
| Memory Type | Configuration EEPROM | OTP Configuration PROM (EEPROM cell) |
| Memory Capacity | 120 kbit | — |
| Interface Type | Serial (Altera configuration protocol) | — |
| Operating Supply Voltage | 3.3 V / 5 V | — |
| Output Compatibility | MultiVolt: 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V | — |
| Programmability | In-System via JTAG (IEEE 1149.1) | One-Time Programmable (OTP) |
| JTAG Support | Yes (dedicated JTAG port) | — |
| Package | PLCC-20 | 8-Pin PDIP (R-PDIP-T8) |
| Mounting Type | Surface Mount / Through-Hole (socket) | Through-Hole |
| Reprogram Cycles | 100 cycles typical | — |
| Operating Temperature | -40C to +85C (industrial) | 0 °C to +70 °C (Commercial) |
| Compatible Altera FPGAs | FLEX 6000, FLEX 8000, MAX 7000, MAX 9000 families | — |
| Cascade Support | Yes (multi-FPGA configuration chains) | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | Compliant (post-lead-free Altera revision) |
| MSL Level | [DATA_NEEDED: MSL level] | — |
| Memory Size | — | 212 Kbit |
| Interface | — | Serial (4-wire: nCS, DCLK, DATA, OE) |
| Configuration Mode Supported | — | FLEX/APEX FPP / PS serial |
| Maximum Clock Frequency | — | 6 MHz |
| Supply Voltage | — | 3.0 V to 3.6 V |
| Programming Standard | — | IEEE Std 1532 / Jam STAPL |
| Standby Current | — | < 50 µA typical |
| Pin Count | — | 8 |
| Lead-Free | — | Yes |
| JEDEC Package Code | — | R-PDIP-T8 |