EPC1L120 vs EPC1213PC8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPC1L120 sa pamamagitan ng Intel at EPC1213PC8 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPC1L120 - Altera/Intel Configuration Device 120 kbit Serial | PLCC-20
EPC1L120 ⚠ Huling Pagbili
Pagsanggunian na paghahambing
| Parametro | EPC1L120 | EPC1213PC8 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | Memory ICs | Memory ICs |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Uri ng Memory | Configuration EEPROM | OTP Configuration PROM (EEPROM cell) |
| Memory Capacity | 120 kbit | — |
| Uri ng Interface | Serial (Altera configuration protocol) | — |
| Supply Voltage na Operasyon | 3.3 V / 5 V | — |
| Output Compatibility | MultiVolt: 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V | — |
| Programmability | In-System via JTAG (IEEE 1149.1) | One-Time Programmable (OTP) |
| JTAG Support | Yes (dedicated JTAG port) | — |
| Packhaging | PLCC-20 | 8-Pin PDIP (R-PDIP-T8) |
| Uri ng Pagpapasok | Surface Mount / Through-Hole (socket) | Through-Hole |
| Reprogram Cycles | 100 cycles typical | — |
| Temperature na Operasyon | -40C to +85C (industrial) | 0 °C to +70 °C (Commercial) |
| Compatible Altera FPGAs | FLEX 6000, FLEX 8000, MAX 7000, MAX 9000 families | — |
| Cascade Support | Yes (multi-FPGA configuration chains) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Compliant (post-lead-free Altera revision) |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Laki ng Memory | — | 212 Kbit |
| Interface | — | Serial (4-wire: nCS, DCLK, DATA, OE) |
| Configuration Mode Supported | — | FLEX/APEX FPP / PS serial |
| Maksimum na Taktiko ng Oras | — | 6 MHz |
| Volte ng Pagbibigay | — | 3.0 V to 3.6 V |
| Programming Standard | — | IEEE Std 1532 / Jam STAPL |
| Standby Current | — | < 50 µA typical |
| Bilang ng Pin | — | 8 |
| Lead-Free | — | Yes |
| JEDEC Package Code | — | R-PDIP-T8 |