EPC1LC20C vs EPC1LC20CEC Comparison
Detailed side-by-side comparison of EPC1LC20C by Altera and EPC1LC20CEC by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPC1LC20C | EPC1LC20CEC |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | Memory ICs |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.40 | $7.20 |
| Memory Type | Serial Configuration Flash | OTP Configuration PROM (anti-fuse) |
| Memory Size | 1 Mbit (1,048,576 bits) | 1 Mbit (1,048,576 bits) |
| Configuration Clock (DCLK) | 8 MHz maximum | β |
| Interface | Serial (DATA/DCLK) + JTAG (IEEE 1149.1) | β |
| Supply Voltage | 3.3 V or 5.0 V | [DATA_NEEDED: VCC range] |
| Programmability | In-system via JTAG | β |
| Cascading Support | Yes (nCS, CS pins) | β |
| Package | 20-pin LCC (Leadless Chip Carrier) | 20-pin PLCC (9x9 mm) |
| Mounting Type | Surface Mount (ceramic) | Surface Mount (PLCC socket compatible) |
| Operating Temperature | -40C to +85C (industrial) | 0Β°C to +70Β°C |
| Compatible FPGA Families | FLEX 10K, ACEX 1K, APEX 20K | ACEX 1K, APEX 20K, FLEX 6000, FLEX 8000, FLEX 10K |
| JTAG Pins | TCK, TMS, TDI, TDO | β |
| Configuration Mode | Slave-serial (FPGA-master) | Altera serial slave/master |
| MSL Level | MSL3 (ceramic, floor life 168 hours) | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | Non-compliant (legacy PLCC package) |
| Configuration Interface | β | Serial (4-pin: DATA, DCLK, nCS, OE) |
| Maximum Clock Frequency | β | 8 MHz |
| Programming Mode | β | One-Time Programmable (OTP) |
| Read Endurance | β | Unlimited |
| Program Endurance | β | 1 cycle (OTP) |
| Lead-Free | β | No (contains lead) |