EPC1LC20C vs EPC1LC20CEC Vergleich
Detaillierter Direktvergleich von EPC1LC20C von Altera und EPC1LC20CEC von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC1LC20C | EPC1LC20CEC |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | Memory ICs |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $7,40 | $7,20 |
| Speichertyp | Serial Configuration Flash | OTP Configuration PROM (anti-fuse) |
| Speichergröße | 1 Mbit (1,048,576 bits) | 1 Mbit (1,048,576 bits) |
| Configuration Clock (DCLK) | 8 MHz maximum | — |
| Schnittstelle | Serial (DATA/DCLK) + JTAG (IEEE 1149.1) | — |
| Versorgungsspannung | 3.3 V or 5.0 V | [DATA_NEEDED: VCC range] |
| Programmability | In-system via JTAG | — |
| Cascading Support | Yes (nCS, CS pins) | — |
| Gehäuse | 20-pin LCC (Leadless Chip Carrier) | 20-pin PLCC (9x9 mm) |
| Montageart | Surface Mount (ceramic) | Surface Mount (PLCC socket compatible) |
| Betriebstemperatur | -40C to +85C (industrial) | 0°C to +70°C |
| Compatible FPGA Families | FLEX 10K, ACEX 1K, APEX 20K | ACEX 1K, APEX 20K, FLEX 6000, FLEX 8000, FLEX 10K |
| JTAG Pins | TCK, TMS, TDI, TDO | — |
| Configuration Mode | Slave-serial (FPGA-master) | Altera serial slave/master |
| MSL-Level | MSL3 (ceramic, floor life 168 hours) | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | Non-compliant (legacy PLCC package) |
| Configuration Interface | — | Serial (4-pin: DATA, DCLK, nCS, OE) |
| Maximale Taktfrequenz | — | 8 MHz |
| Programming Mode | — | One-Time Programmable (OTP) |
| Read Endurance | — | Unlimited |
| Program Endurance | — | 1 cycle (OTP) |
| Lead-Free | — | No (contains lead) |