EPC1LC20U vs EPC1213LC20 Comparison

Detailed side-by-side comparison of EPC1LC20U by Altera and EPC1213LC20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPC1LC20U EPC1213LC20
Brand Altera Intel
Category Memory ICs EEPROM
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $9.75 $7.40
Memory Type OTP (One-Time-Programmable) Configuration PROM OTP Configuration PROM (Flash-based)
Memory Density 1 Mbit β€”
Configuration Interface Altera Serial Configuration (4-wire) β€”
Maximum DCLK Frequency 8 MHz β€”
Package 20-pin PLCC (9x9 mm) 20-PLCC (J-lead, 9x9 mm)
Operating Voltage (VCC) 3.3 V typical [DATA_NEEDED: full range] β€”
Configuration Time [DATA_NEEDED: depends on bitstream length and DCLK] β€”
Cascading Support Yes (multi-PROM daisy-chain for larger bitstreams) β€”
Programming Method Altera APU / third-party JTAG programmer β€”
Lead-Free (Pb-free) Finish Yes ("U" suffix) β€”
Mounting Type Surface Mount Surface Mount
Compatibility Altera SRAM-based LUT FPGAs (APEX, FLEX, ACEX, Cyclone, Stratix families) β€”
Operating Temperature [DATA_NEEDED: industrial/commercial grade range] 0C to +70C (Commercial)
MSL Level [DATA_NEEDED] β€”
RoHS Status Compliant (Pb-free finish, "U" suffix) [DATA_NEEDED: RoHS compliance status]
Memory Size β€” 212 Kbit
Interface β€” Serial (Altera FPGA configuration protocol)
Maximum Configuration Clock β€” 6 MHz
Supply Voltage (Core) β€” 5.0 V
I/O Voltage Tolerance β€” 3.3 V / 5.0 V
Programmability β€” One-Time Programmable (OTP) via IEEE 1149.1 JTAG
In-System Programmability β€” Yes (5.0 V and 3.3 V ISP)
Supported FPGA Families β€” ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX
Compression Support β€” Yes (FPGA decompresses bitstream during load)
Package Code β€” QCCJ

Datasheets & Resources

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