EPC1LC20U vs EPC1213LC20 对比

详细并排对比 EPC1LC20U 出自 Altera 和 EPC1213LC20 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC1LC20U EPC1213LC20
品牌 Altera Intel
分类 Memory ICs EEPROM
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $9.75 $7.40
存储器类型 OTP (One-Time-Programmable) Configuration PROM OTP Configuration PROM (Flash-based)
Memory Density 1 Mbit —
Configuration Interface Altera Serial Configuration (4-wire) —
Maximum DCLK Frequency 8 MHz —
封装 20-pin PLCC (9x9 mm) 20-PLCC (J-lead, 9x9 mm)
Operating Voltage (VCC) 3.3 V typical [DATA_NEEDED: full range] —
Configuration Time [DATA_NEEDED: depends on bitstream length and DCLK] —
Cascading Support Yes (multi-PROM daisy-chain for larger bitstreams) —
Programming Method Altera APU / third-party JTAG programmer —
Lead-Free (Pb-free) Finish Yes ("U" suffix) —
安装类型 Surface Mount Surface Mount
Compatibility Altera SRAM-based LUT FPGAs (APEX, FLEX, ACEX, Cyclone, Stratix families) —
工作温度 [DATA_NEEDED: industrial/commercial grade range] 0C to +70C (Commercial)
MSL 等级 [DATA_NEEDED] —
RoHS 状态 Compliant (Pb-free finish, "U" suffix) [DATA_NEEDED: RoHS compliance status]
存储容量 — 212 Kbit
接口 — Serial (Altera FPGA configuration protocol)
Maximum Configuration Clock — 6 MHz
Supply Voltage (Core) — 5.0 V
I/O Voltage Tolerance — 3.3 V / 5.0 V
Programmability — One-Time Programmable (OTP) via IEEE 1149.1 JTAG
In-System Programmability — Yes (5.0 V and 3.3 V ISP)
Supported FPGA Families — ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX
Compression Support — Yes (FPGA decompresses bitstream during load)
Package Code — QCCJ

数据手册与资源

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