EPC2CC20N vs EPC2LC20N-W Comparison
Detailed side-by-side comparison of EPC2CC20N by Altera and EPC2LC20N-W by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPC2CC20N | EPC2LC20N-W |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | Memory ICs |
| Lifecycle Status | NRND | Obsolete |
| Function | Configuration device for SRAM-based LUT FPGAs | — |
| Density | [DATA_NEEDED: bitstream density in bits] | — |
| Package | PLCC-20 | 20-LCC (J-Lead) PLCC-20 |
| Configuration Interface | 16-bit parallel (FPP) / Passive Serial (PS) | Serial (DATA, DCLK, OE, nCS) |
| Supply Voltage (VCC) | 3.3 V | 3.0 V to 3.6 V, 4.75 V to 5.25 V |
| Programming Interface | JTAG (IEEE 1149.1) via ByteBlasterMV / USB-Blaster | — |
| In-System Programmable | Yes | — |
| Error Detection | 16-bit CRC on configuration frames | — |
| Configuration Modes Supported | FPP and PS (depends on host FPGA) | — |
| Cascadable | Yes (multiple EPC2 devices for larger bitstreams) | — |
| Open-Drain Status Pin | Yes (CONF_DONE / nSTATUS compatible) | — |
| Operating Temperature | [DATA_NEEDED: industrial/commercial temp range] | [DATA_NEEDED: operating temperature range] |
| Mounting Type | Surface Mount (PLCC-20 socket compatible) | Surface Mount |
| MSL Level | [DATA_NEEDED: MSL rating] | — |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | — |
| Memory Type | — | EPROM (UV-erasable, ISP) |
| Memory Size | — | 1.6 Mbit |
| Programmable Type | — | In System Programmable |
| Internal Oscillator Frequency | — | 66.7 MHz |
| ISP Interface | — | JTAG (IEEE 1149.1) |
| Supported FPGA Families | — | APEX 20K, ACEX 1K, Mercury, FLEX 10K, Stratix, Cyclone |
| Packaging | — | Tape & Reel (-W suffix) |
| Cascade Support | — | Yes (with other EPC2 devices) |
| Pin Count | — | 20 |
| Lead-Free / RoHS | — | [DATA_NEEDED: RoHS status for -W variant] |