EPC2LC20N-W vs EPC2LI20NGA Comparison
Detailed side-by-side comparison of EPC2LC20N-W by Altera and EPC2LI20NGA by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPC2LC20N-W | EPC2LI20NGA |
|---|---|---|
| Brand | Altera | Altera |
| Category | Memory ICs | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Memory Type | EPROM (UV-erasable, ISP) | — |
| Memory Size | 1.6 Mbit | 1.6 Mbit |
| Programmable Type | In System Programmable | — |
| Configuration Interface | Serial (DATA, DCLK, OE, nCS) | Passive Serial / Passive Parallel |
| Internal Oscillator Frequency | 66.7 MHz | — |
| Supply Voltage (VCC) | 3.0 V to 3.6 V, 4.75 V to 5.25 V | — |
| ISP Interface | JTAG (IEEE 1149.1) | — |
| Supported FPGA Families | APEX 20K, ACEX 1K, Mercury, FLEX 10K, Stratix, Cyclone | — |
| Package | 20-LCC (J-Lead) PLCC-20 | 20-PLCC (9x9 mm) |
| Mounting Type | Surface Mount | Surface Mount / Thru-Hole Socket |
| Packaging | Tape & Reel (-W suffix) | — |
| Cascade Support | Yes (with other EPC2 devices) | — |
| Pin Count | 20 | — |
| Lead-Free / RoHS | [DATA_NEEDED: RoHS status for -W variant] | — |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | — |
| Function | — | In-System Programmable Configuration PROM |
| Target Device | — | SRAM-based LUT FPGAs |
| Operating Temperature Range | — | -40C to +85C (Industrial) |
| Supply Voltage | — | 3.0 V to 3.6 V (3.3 V typical) |
| Programming Method | — | In-System via JTAG (IEEE 1149.1) |
| Cascadable | — | Yes (DATA, DCLK chain) |
| RoHS Status | — | Compliant (lead-free 'G' suffix) |
| Lead-Free Termination | — | Yes (NiPdAu) |
| Process Technology | — | CMOS EEPROM |
| Manufacturer | — | Altera / Intel PSG |
| Datasheet Document | — | EPC2 datasheet (Altera) |