EPC2LI20N vs EPC2LC20-V Comparison

Detailed side-by-side comparison of EPC2LI20N by Altera and EPC2LC20-V by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPC2LI20N EPC2LC20-V
Brand Altera Altera
Category Memory ICs Memory ICs
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $5.10 $9.45
Memory Type Non-volatile configuration PROM (Flash) Configuration PROM (Flash-based, in-system programmable)
Memory Size 1.6 Mbit β€”
Programmable Type In System Programmable (ISP via JTAG) β€”
Configuration Mode Serial β€”
Maximum Configuration Frequency 10 MHz β€”
Supply Voltage (VCCINT) 3.0 V to 3.6 V β€”
Supply Voltage (VCCIO) 4.5 V to 5.5 V β€”
Package / Case 20-PLCC (J-Lead), 9x9 mm β€”
Mounting Type Surface Mount Surface Mount (PLCC socket compatible)
Packaging Tube β€”
Operating Temperature [DATA_NEEDED: operating temperature range] β€”
Supported FPGA Series ACEX 1K, APEX II, Cyclone, Stratix II β€”
JTAG Interface IEEE 1149.1 boundary scan (TCK/TDI/TMS/TDO) β€”
Configuration Pins nCS, DCLK, DATA, nCONFIG, nSTATUS, CONF_DONE β€”
RoHS Status [DATA_NEEDED: RoHS status] Compliant (per distributor listings)
Memory Density β€” 1.6 Mbit
Configuration Interface β€” Serial (Altera FPP/PS modes via DCLK/nSTATUS/CONF_DONE)
Maximum Configuration Clock β€” 10 MHz
Supply Voltage VCC β€” 3.3 V
I/O Tolerance β€” 5 V tolerant on configuration pins
In-System Programming β€” Yes, via IEEE 1149.1 JTAG (TMS/TCK/TDI/TDO)
Cascade Support β€” Yes, daisy-chainable for >1.6 Mbit designs
Operating Temperature Range (V suffix) β€” 0 Β°C to +70 Β°C (commercial)
Package Type β€” 20-pin PLCC (JEDEC MS-018)
Package Dimensions β€” 9 x 9 mm body, 1.27 mm pitch
Supported FPGA Families β€” APEX 20K, ACEX 1K, FLEX 10K, FLEX 6000, MAX 9000
Lead-Free β€” Yes

Datasheets & Resources

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