EPF10K130EBI356-2 vs EPF10K130EBC356-1N Comparison
Detailed side-by-side comparison of EPF10K130EBI356-2 by Altera and EPF10K130EBC356-1N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPF10K130EBI356-2 | EPF10K130EBC356-1N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $107.25 | $18.20 |
| Family | FLEX 10KE | FLEX 10KE |
| System Gates | 130,000 | β |
| Logic Elements (LEs) | 6,656 | 6,656 |
| Logic Array Blocks (LABs) | 832 | β |
| Embedded Memory (EAB) | 65,536 bits | β |
| User I/Os | 274 | β |
| Package | 356-LBGA (FineLine BGA) | 356-LBGA |
| Process Technology | CMOS 0.22 um | 0.22 Β΅m |
| Core Supply Voltage | 2.5 V | 2.5 V |
| I/O Supply Voltage | 3.3 V (multi-voltage I/O banks) | 3.3 V |
| Propagation Delay | 0.6 ns | 0.6 ns |
| Maximum Frequency | 333.33 MHz | β |
| Operating Temperature | 0 C to +70 C (industrial "I") | 0 Β°C to 70 Β°C (Commercial) |
| Speed Grade | -2 (mid) | -1 |
| Programming Interface | JTAG (IEEE 1149.1) / serial configuration | β |
| Configuration Mode | SRAM-based, in-system programmable | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance for EPF10K130EBC356-1N] |
| Typical Gates | β | 130,000 |
| Maximum System Gates | β | [DATA_NEEDED: maximum system gates for EPF10K130E] |
| Embedded Array Blocks (EABs) | β | [DATA_NEEDED: EAB count for EPF10K130E] |
| Total RAM Bits | β | 65,536 |
| User I/O Pins | β | 274 |
| Package Code | β | LBGA |
| Logic Family | β | CMOS |
| Maximum Internal Frequency | β | 333.33 MHz |
| JTAG Boundary-Scan | β | IEEE Std. 1149.1-1990 compliant |
| PCI Compliance | β | PCI Local Bus Specification Rev. 2.2 (33/66 MHz, 3.3 V and 5.0 V) |
| Mounting Type | β | Surface Mount |