EPF10K130EBI356-2 vs EPF10K130EBC356-1N 比較
詳細な並列比較: EPF10K130EBI356-2 メーカー: Altera および EPF10K130EBC356-1N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPF10K130EBI356-2 | EPF10K130EBC356-1N |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $107.25 | $18.20 |
| Family | FLEX 10KE | FLEX 10KE |
| System Gates | 130,000 | — |
| Logic Elements (LEs) | 6,656 | 6,656 |
| Logic Array Blocks (LABs) | 832 | — |
| Embedded Memory (EAB) | 65,536 bits | — |
| User I/Os | 274 | — |
| パッケージ | 356-LBGA (FineLine BGA) | 356-LBGA |
| Process Technology | CMOS 0.22 um | 0.22 µm |
| Core Supply Voltage | 2.5 V | 2.5 V |
| I/O Supply Voltage | 3.3 V (multi-voltage I/O banks) | 3.3 V |
| Propagation Delay | 0.6 ns | 0.6 ns |
| Maximum Frequency | 333.33 MHz | — |
| 動作温度 | 0 C to +70 C (industrial "I") | 0 °C to 70 °C (Commercial) |
| Speed Grade | -2 (mid) | -1 |
| Programming Interface | JTAG (IEEE 1149.1) / serial configuration | — |
| Configuration Mode | SRAM-based, in-system programmable | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance for EPF10K130EBC356-1N] |
| Typical Gates | — | 130,000 |
| Maximum System Gates | — | [DATA_NEEDED: maximum system gates for EPF10K130E] |
| Embedded Array Blocks (EABs) | — | [DATA_NEEDED: EAB count for EPF10K130E] |
| Total RAM Bits | — | 65,536 |
| User I/O Pins | — | 274 |
| Package Code | — | LBGA |
| Logic Family | — | CMOS |
| Maximum Internal Frequency | — | 333.33 MHz |
| JTAG Boundary-Scan | — | IEEE Std. 1149.1-1990 compliant |
| PCI Compliance | — | PCI Local Bus Specification Rev. 2.2 (33/66 MHz, 3.3 V and 5.0 V) |
| 実装タイプ | — | Surface Mount |