EPM240GT100-5N vs EPM240T100C5N Comparison
Detailed side-by-side comparison of EPM240GT100-5N by Altera and EPM240T100C5N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM240GT100-5N | EPM240T100C5N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Series | MAX II | — |
| Logic Elements | 240 | — |
| Macrocells | 192 | — |
| User Flash Memory | 8 Kbits (8192 bits) | — |
| Maximum User I/O | 80 | — |
| Pin-to-Pin Delay (tPD) | 4.7 ns (speed grade 5) | — |
| Maximum Operating Frequency | 100 MHz | — |
| Process Technology | 0.18 µm, 6-layer metal Flash | 0.18 µm, 6-layer-metal flash |
| Package | TQFP-100 (14x14 mm, 0.5 mm pitch) | 100-pin TQFP (T100), 14x14 mm |
| Mounting Type | Surface Mount | Surface Mount |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| Operating Temperature | 0C to +85C (commercial) | 0 °C to +85 °C (commercial, 'C' suffix) |
| Programming Interface | IEEE 1149.1 JTAG (in-system programmable) | JTAG (IEEE 1149.1) / ISP |
| Configuration Memory | On-chip non-volatile Flash (instant-on) | — |
| RoHS Status | Compliant | Compliant (lead-free) |
| MSL Level | 3 (168 hours) | — |
| Family | — | MAX II |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LEs) | — | 240 |
| Equivalent Macrocells | — | 192 |
| On-Chip User Flash | — | 8 Kbits |
| Maximum User I/O Pins | — | 80 |
| Number of I/O Banks | — | 4 |
| Pin-to-Pin Delay (speed grade 5) | — | 4.7 ns |
| Maximum Internal Frequency | — | 201.1 MHz |
| Core Supply Voltage (VCCINT) | — | 2.5 V / 3.3 V |