EPM240GT100-5N vs EPM240T100C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM240GT100-5N sa pamamagitan ng Altera at EPM240T100C5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM240GT100-5N | EPM240T100C5N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Series | MAX II | — |
| Logic Elements | 240 | — |
| Macrocells | 192 | — |
| User Flash Memory | 8 Kbits (8192 bits) | — |
| Maximum User I/O | 80 | — |
| Pin-to-Pin Delay (tPD) | 4.7 ns (speed grade 5) | — |
| Maximum Operating Frequency | 100 MHz | — |
| Process Technology | 0.18 µm, 6-layer metal Flash | 0.18 µm, 6-layer-metal flash |
| Packhaging | TQFP-100 (14x14 mm, 0.5 mm pitch) | 100-pin TQFP (T100), 14x14 mm |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| Temperature na Operasyon | 0C to +85C (commercial) | 0 °C to +85 °C (commercial, 'C' suffix) |
| Programming Interface | IEEE 1149.1 JTAG (in-system programmable) | JTAG (IEEE 1149.1) / ISP |
| Configuration Memory | On-chip non-volatile Flash (instant-on) | — |
| Tindminan RoHS | Compliant | Compliant (lead-free) |
| Level ng MSL | 3 (168 hours) | — |
| Family | — | MAX II |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LEs) | — | 240 |
| Equivalent Macrocells | — | 192 |
| On-Chip User Flash | — | 8 Kbits |
| Maximum User I/O Pins | — | 80 |
| Number of I/O Banks | — | 4 |
| Pin-to-Pin Delay (speed grade 5) | — | 4.7 ns |
| Maximum Internal Frequency | — | 201.1 MHz |
| Core Supply Voltage (VCCINT) | — | 2.5 V / 3.3 V |