EPM240M100C5N vs EPM240T100C5N Comparison

Detailed side-by-side comparison of EPM240M100C5N by Intel and EPM240T100C5N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EPM240M100C5N EPM240M100C5N - MAX II CPLD 192MC 80 I/O | Intel

EPM240M100C5N - MAX II CPLD 192MC 80 I/O | Intel

EPM240M100C5N ⚠ Last Time Buy

Specification Comparison

Parameter EPM240M100C5N EPM240T100C5N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last Time Buy Active
Family MAX II MAX II
Logic Elements 240 —
Macrocells 192 —
User I/Os 80 —
Propagation Delay (tPD) 4.7 ns —
User Flash Memory 8 Kbits —
Supply Voltage - Core 1.8 V —
Supply Voltage - I/O 1.5 V / 1.8 V / 2.5 V / 3.3 V —
Operating Temperature -40 C to +125 C 0 °C to +85 °C (commercial, 'C' suffix)
Package 100-ball MBGA (Micro FBGA), 6 x 6 mm, 0.5 mm pitch 100-pin TQFP (T100), 14x14 mm
Mounting Type Surface Mount Surface Mount
Process Technology 0.18 µm CMOS 0.18 µm, 6-layer-metal flash
Configuration Memory On-chip Flash (non-volatile) —
JTAG Support IEEE 1149.1 boundary-scan —
RoHS Status Compliant (lead-free) Compliant (lead-free)
Logic Family CMOS —
Device Type — CPLD (Complex Programmable Logic Device)
Logic Elements (LEs) — 240
Equivalent Macrocells — 192
On-Chip User Flash — 8 Kbits
Maximum User I/O Pins — 80
Number of I/O Banks — 4
Pin-to-Pin Delay (speed grade 5) — 4.7 ns
Maximum Internal Frequency — 201.1 MHz
Core Supply Voltage (VCCINT) — 2.5 V / 3.3 V
I/O Supply Voltage (VCCIO) — 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt)
Programming Interface — JTAG (IEEE 1149.1) / ISP

Datasheets & Resources

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