EPM240T100C4N vs EPM240T100A5N Comparison
Detailed side-by-side comparison of EPM240T100C4N by Altera and EPM240T100A5N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM240T100A5N - 192-Macrocell MAX II CPLD, 100-TQFP | Intel / Altera
EPM240T100A5N β ActiveSpecification Comparison
| Parameter | EPM240T100C4N | EPM240T100A5N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $6.10 | $7.05 |
| Family | MAX II | MAX II |
| Device | EPM240 | β |
| Macro Cells | 192 | 192 |
| Logic Elements | 240 | β |
| Propagation Delay (tPD) | 4.7 ns (max) | β |
| Maximum Frequency | 247.5 MHz | β |
| User I/O | 80 | β |
| Supply Voltage - Internal | 2.5 V / 3.3 V | β |
| I/O Voltage (MultiVolt) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | β |
| Process Technology | 0.18 Β΅m | 0.18 Β΅m |
| Programmable Type | In-System Programmable (Flash) | β |
| Package / Case | 100-TQFP | β |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0 Β°C to +85 Β°C (commercial, 'C' suffix) | 0C to +85C (commercial, "A5N" suffix) |
| JTAG Support | IEEE 1149.1 boundary-scan | β |
| RoHS Status | Compliant (lead-free, 'N' suffix) | Compliant (Pb-free) |
| Logic Elements (LE) | β | 240 |
| User I/O Count | β | 80 |
| Pin-to-Pin Logic Delay (tPD) | β | 4.7 ns |
| Maximum Internal Frequency | β | 201.1 MHz |
| Supply Voltage | β | 2.5 V / 3.3 V |
| I/O Bank Count | β | 4 (multi-voltage) |
| Configuration Memory | β | On-chip Flash (instant-on) |
| Programming Interface | β | JTAG (IEEE 1149.1) / ISP |
| Package | β | 100-pin TQFP (14 x 14 x 1.0 mm) |