EPM3032ALC44-7 vs EPM3032ALC44-10N Comparison

Detailed side-by-side comparison of EPM3032ALC44-7 by Altera and EPM3032ALC44-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3032ALC44-7 EPM3032ALC44-10N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $0.95 $0.94
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) β€”
Logic Elements / Macrocells 32 macrocells β€”
Logic Array Blocks (LABs) 2 2
System Gates 600 β€”
Number of User I/O Pins 34 β€”
Global Clocks 2 β€”
Propagation Delay (tPD1, max) 7.5 ns β€”
Maximum Internal Frequency (fMAX) 138.9 MHz β€”
Supply Voltage (VCCINT / VCCIO) 3.3 V β€”
I/O Tolerant Voltage 2.5 V / 3.3 V / 5.0 V (MultiVolt) β€”
Program Memory Type EEPROM β€”
In-System Programming (ISP) Yes - IEEE 1149.1 JTAG β€”
Operating Temperature 0 Β°C to +70 Β°C (Commercial) [DATA_NEEDED: industrial/commercial range]
Package 44-pin PLCC (J-Lead), 16.59 x 16.59 mm, 3.81 mm height 44-pin PLCC (J-Lead, surface mount)
Mounting Type Surface Mount Surface Mount
RoHS Status Not Compliant (per Arrow listing) [DATA_NEEDED: compliant or non-compliant]
Part Status Obsolete β€”
ECCN EAR99 β€”
Product Type β€” CPLD (Complex Programmable Logic Device)
Logic Gates β€” 600 gates
Macrocells β€” 32
User I/O Pins β€” 34
Propagation Delay (tPD) β€” 10 ns
Internal fMAX β€” 103.1 MHz
Supply Voltage (VCCINT) β€” 3.3 V
I/O Voltage (VCCIO) β€” 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O)
Technology β€” CMOS EEPROM-based
In-System Programmability β€” Yes, via IEEE 1149.1 JTAG
ISP Standard Compliance β€” IEEE Std. 1532
Boundary-Scan Test (BST) β€” Yes, IEEE 1149.1 compliant

Datasheets & Resources

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